Currency testing system

ABSTRACT

In a currency acceptor, a transport having a reversible drive conveys a bill to be tested along a path of travel past a first photoelectric detector, a transducer head at a test station for sensing the physical properties of the bill, and then a second photoelectric detector. If the grid areas on opposite sides of the portrait on the bill have physical properties indicative of validity, testing circuitry responsive to the head produces an accept signal as each grid area passes the head. To be deemed valid, the first grid area must cause the production of an accept signal, the leading and trailing edges of the bill must be concurrently detected by the two photoelectric detectors as the portrait passes the head (determines that the bill is not too short), the second grid area must cause the production of a second accept signal by the time the bill reaches a predetermined position along the path, and thereafter the first photoelectric detector must not detect the bill or another, following bill until such time that the bill completely passes the second photoelectric detector and is accepted. If an invalid condition is encountered, the transport drive is reversed and the bill or counterfeit material is returned to the depositor and thereby rejected.

United States Patent Ptacek [4 1 Dec. 19, 1972 [54] CURRENCY TESTINGSYSTEM [72] Inventor: James'F. Ptacek, Kansas City, Mo.

[73] Assignee: The Vendo Company, Kansas City,

[22] Filed: Oct. 9, 1970 [21] Appl. No.: 79,444

[52] US. Cl ..209/75, 209/82, 209/DlG. 2 [51] Int. Cl. ..B07c 3/12 [58]Field of Search ..209/72, 75, 82; 250/219 [56] References Cited UNITEDSTATES PATENTS 2,950,799 8/1960 Timms ..209/75 X 3,485,358 l2/l969Hooker ..209/75 X Primary Examiner--Richard A. Schacher AttorneySchmidt,Johnson, Hovey, Williams & Chase [57] ABSTRACT In a currency acceptor, atransport having a reversible drive conveys a bill to, be tested along apath of travel past a first photoelectric detector,a transducer head ata test station for sensing the physical properties of the bill, and thena second photoelectric detector. if the grid areas on opposite sides ofthe portrait on the bill have physical properties indicative ofvalidity, testing circuitry responsive to the head produces an acceptsignal as each grid area passes the head. To be deemed valid, the firstgrid area must cause the production of an accept signal, the leading andtrailing edges of the bill must be concurrently detected by the twophotoelectric detectors as the portrait passes the iiafia eterarme'ihaian; bill is Yi'f i'oFEh'oftTGE:- second grid area must cause theproduction of a second accept signal by the time the bill reaches apredetermined position along the path, and thereafter the firstphotoelectric detector must not detect the bill or another, followingbill until such time that the bill completely passes the secondphotoelectric detector and is accepted. If an invalid condition isencountered, the transport drive is reversed and the bill or counterfeitmaterial is returned to the depositor and thereby rejected.

6 Claims, 8 Drawing Figures sum 1 0F 2 PATENTED DEC 19 me Lo\ 95 SamoaJames F Pfacek 122109 muzwnmusou ATTORNEYS.

PATENTEDuEc 19 I972 SHEET 2 [IF 2 0 OO O O O 0 OO O O O T Mfr: Opt MagAc AMI B AM2 AM3 Cr Rs STOndbyOOOOOOOOOOO Fig.8.

R k ww W m AH m Pd C! m m TH J ME d w H m .w 4| M & n .m C .m D W Grid 2Test Area BY J J o-zzhwq-ezm.

ATTORNEYS.

Fig.2

CURRENCY TESTING SYSTEM CROSS-REFERENCES See my concurrently filedcopending application, Ser. No. 79,456, now U.S. Pat. No. 3,656,835issued Apr. 18, 1972 entitled Receiving and Transporting Apparatus forCurrency, and the copending application of Boley A. Andrews and James F.Ptacek, Ser. No. 886,530, filed Dec. 19, 1969, and entitled Com binedOptical and Magnetic Transducer, now U.S. Pat. No. 3,612,835 issued Oct.12, 1971.

This application relates to improvements in systems for testing a billdeposited in a currency acceptor or validator, in order to determinewhether the bill is valid or invalid and to effect acceptance if validor rejection if invalid.

It is an important object of the present invention to provide, in acurrency acceptor for receiving individual bills inserted thereinto, animproved system for running a series of tests on an inserted bill todetermine the validity thereof.

Another important object of this invention is to provide a system asaforesaid capable of running sequential tests regarding the physicalproperties of the bill, the length thereof and the locations of variousfeatures of the bill relative to its length.

Still another important object of the invention is to provide a systemas aforesaid in which the various tests are run as the bill is conveyedby a transport along a predetermined path of travel, and whereinessentially instantaneous rejection of the bill by reversal of thetransport drive is effected if an invalid condition is encountered.

Other objectives and features of the present invention will becomeapparent as the detailed description proceeds.

In the drawings:

FIG. 1 is a block and logic diagram of the currency testing system;

FIG. 2 is a diagrammatic, sectional view of a currency acceptoremploying a bill transport of the type shown and described in myabove-identified copending application Ser. No. 79,456, now U.S. Pat.No. 3,656,6l5 issued Apr. 18, 1972 showing the locations of thephotoelectric detectors and the transducer head;

FIGS. 3-6 are a series of views similar to FIG. 2 showing the insertedbill at progressive stages of advancement through the acceptor;

FIG. 7 shows the test areas of a one dollar bill of United Statescurrency, and includes a graph illustrating the timing of certainsignals produced by the system; and

FIG. 8 is a table explaining the logic of the system.

DESCRIPTION FIGS. 1 AND 2 Referring initially to FIG. 2, a currencyacceptor is shown having a bill transport 10 which receives a bill 12guided into a slot 14 by a ramp 16 that, together with other parts ofthe acceptor housing, presents an insert opening 18. The bill 12 isinitially placed in the opening 18 upon the ramp 16 and its leading edgeis manually fed into the slot 14, causing activation of the transport 10in a manner to be subsequently described.

The transport 10 advances the bill 12 around a sharp bend 20 and thenalong a path of travel defined by an elongated, longitudinally straight,narrow channel 22.

The bill 12 is conveyed by friction rollers such as illustrated at 24and, in the channel 22, such rollers are opposed by idler rollers 26.The transport 10 employs a constant speed, reversible drive, all of therollers 24 being of the same diameter and driven at the same speed.Accordingly, the bill 12 is maintained in a flat condition sandwichedbetween the opposed rollers 24 and 26, as it is advanced along therectilinear path defined by the narrow channel 22.

A small lamp 28 (hereinafter referred to as the top light) is arrangedto direct a beam of light toward a phototransistor 30 located in anelectronics module 32. The light beam is interrupted by the bill 12 whenthe leading edge of the bill is fully inserted in the slot 14 asillustrated in FIG. 2. The beam from top light 28 will continue to beblocked by the bill 12 until the trailing edge thereof passes the upperend of the channel 22, as will be discussed hereinafter. A secondelectric lamp 34 (hereinafter referred to as the bottom light) islocated at the bottom of the channel 22 and directs a beam of lightacross the channel 22 toward a phototransistor 36. If further detailsare desired respecting the structure and operation of the transport 10,the physical arrangement of the bill detection devices or the teststation to be subsequently described, reference may be made to myabove-identified copending application Ser. No. 79,456.

A combined optical and magnetic transducer 38 presents the test stationand is mounted in the electronics module 32 midway between thephototransistors 30 and 36 and is opposed by an electric lamp 40 on theother side of the channel 22. A combined transducer head of this type isshown and described in the above-identified copending application ofAndrews and Ptacek, Ser. No. 886,530, and may be referred to for adisclosure of the exact construction of the head. It should beunderstood, however, that other types of transducers may be employed inthe present invention depending upon the nature of the circuitryresponsive to the transducer utilized to determine whether or not thephysical properties of the bill sensed by the transducer arecharacteristic of a genuine bill.

In FIG. 1 an optical amplifier and bandpass filter 42 is illustrated andis responsive to the optical sensing of the transducer head 38, in thisinstance the transmittance of the bill 12. An amplifier 44 is responsiveto the electrical output of the transducer head 38, which will be afunction of the magnetic properties of the printing on the bill 12. Theoutputs of the optical and magnetic channels are fed into an AND gate 46that, in turn, has its output connected to the input of a coincidencecounter 48. As will be discussed more fully hereinafter, physicalproperties of the bill indicative of validity cause the counter 48 todeliver an accept signal Ac to both a three-input AND gate 50 and afive-input AND gate 52.

The input of a logic inverter 54 is designated T, and the input of alogic inverter 56 is designated B. T represents interruption of thelight beam from the top light 28, which causes the bill 12 to bedetected by the phototransistor 30 since the light normally impingingthereon is blocked. Likewise, B represents interruption of the lightpath of the bottom light 34, which causes the phototransistor 36 todetect the bill since the light l060ll 0102 normally impinging thereonis now blocked by the presence of the bill. By inversion, T appears online 58 from the output of the inverter 54, and H appears on line 60from the output of the inverter 56.

An inverter 62 is in series with the inverter 54 and thus its output isdesignated T. Likewise, an inverter 64 in series with the inverter 56delivers any output designated B. A two-input AND gate 66 delivers anoutput T-B which is fed to one input of a reject AND gate 68 and to theset input (S) of a set-reset flip-flop 70.

The output of the AND gate 50 is connected to the set input (S) ofaset-reset flip-flop 72 having outputs designated 1 and 0. This samenomenclature is used to identify the outputs of the flip-flop 70, and itmay be seen that the l outputs of both of the flipflops 70 and 72 areconnected to inputs of the AND gate 52. The two remaining inputs of ANDgate 52 are connected to line 58 and the output of inverter 64.

The output of AND gate 52 is fed to the set input (S) of a set-resetflip-flop 74 having its 1 output connected to one input of a three-inputAND gate 76, and to one input of a two-input reject AND gate 77. The 0output of flip-flop 74 is connected to one input of a two-input rejectAND gate 78, the other input thereof being connected to the l output offlip-flop 72 via a delay circuit 80. A fourth reject AND gate 82 has twoinputs connected to the 0 output of flip-flop 72 and the output ofinverter 64 respectively. The outputs of the four reject AND gates, 68,77, 78 and 82 are connected to respective inputs of a four-input OR gate84. When one of its inputs is excited at the l logic level, the OR gate84 delivers a reject command Rj at its output which effects a reversalof the transport drive, as diagrammatically indicated by the blocklabelled R- everse." An inverter 86 is connected between the output ofOR gate 84 and one of the inputs of AND gate 76, the output of inverter86 being designated by the logic notation Rj.

The remaining input of AND gate 76 is connected to line 60, such gatebeing operable to deliver a credit signal Cr at its output which is fedto the credit establishing circuitry of a vending machine, or initiateschange payout, etc. This broad function is represented by the blocklabelled Payout and/or Vend. Manifestly, the particular use to be madeof the credit signal Cr is dependent upon the particular apparatus withwhich the testing system of the present invention is utilized.

A reset AND gate 88 is responsive to Rj and has its output connected toone input of a two-input reset OR gate 90, the other input thereof beingresponsive to Cr. The output of OR gate 90 is fed to a delay circuit 92that, in turn, delivers a reset pulse Rs to the reset inputs (R) of theflip-flops 70, 72 and 74.

The reversible drive of the bill transport is functionally illustratedby the blocks carrying the legends Forwar and Reverse. The reverse modein response to Rj is discussed above. Normal operation in the forwarddirection is initiated by T, and such operation is sustained by theoccurrence of the 1 logic level at the 1 output of flip-flop 72,represented by the notation AM]. Both T and AMI are applied torespective inputs of an OR gate 94 whose output executes the forwarddrive function.

LOGIC EXPLANATION AND CORRELATION WITH FIGS. 3-6

It should be understood that the various gates and flip-flops areresponsive only to input signals at the 1 logic level. The flip-flop 72is the first accept memory in the logic system and, when set, the llogic level appears at its 1 output and is referred to herein as AMI.The flip-flop is the second accept memory of the system; accordingly, al logic levelat its 1 output will be referred to as AM2. The flip-flop74 is the third accept memory of the system, thus setting thereofproduces a 1 logic level at its 1" output that will be referred toherein as AM3.

The table illustrated in FIG. 8 shows the operation of the system inlogic steps from the standby condition to reset (return to standby). Thepresence of a 0? in a particular column of the table indicates that theparticular function or signal represented in the column is not beingproduced; conversely, the appearance of a 1 indicates the presence ofsuch function. The second column identified Mtr refers to the motor ordrive of the bill transport 10. The third and fourth are identified Opt.and Mag. respectively, referring to the optical and magnetic channels ofthe discriminator circuitry. The other column headings have beenpreviously identified.

FIG. 3 illustrates the position of the bill 12 in the acceptor at thetime AMl is produced (flip-flop 72 set), assuming that the bill haspassed the first validity test. Note that the leading edge 96 of thebill is approaching but has not as yet interrupted the light impingingon the bottom phototransistor 36. The trailing edge 98 still blocks thelight emanating from the top light 28.

FIG. 4 shows the position of the bill 12 at the time of occurrence ofT-Bv and the setting of flip-flop 70, producing AM2. The rays from boththe bottom light 34 and the top light 28 are blocked by the leading andtrailing edges 96 and 98 respectively.

FIG. 5 shows the bill 12 at the time that the flip-flop 74 is set,producing .AM3, assuming that the appropriate test has been passed. Notethat the trailing edge 98 of the bill 12 now does not block light fromthe top light 28. i

FIG. 6 shows the bill 12 still later in its path of travel at a timewhen a second grid delay pulse 62D is delivered by the delay circuit 80.This will be discussed more fully hereinafter.

OPERATION The bill 12 is inserted into opening 18 and advanced by handinto slot 14 in a prescribed orientation until the light path from thetop light 28 is interrupted. This oc currence is T and starts thetransport drive in the forward direction. Referring to FIG. 7, the graphillustrates that, in an exemplary drive arrangement, 0.3 sec. elapsesfrom the time that the drive is activated until the leading edge of thebill 12 is between the transducer head 38 and the opposing lamp 40. Atime period of 0.5 see. is then required for the bill to pass completelyby the head, i.e., at the expiration of the next 0.5 sec., the trailingedge of the bill will be leaving the head 38. Being a constant speeddrive, time may be equated to distance. Accordingly, a one dollar billof United States currency is illustrated having a length ofapproximately 6.2 inches, which is equivalent to the 0.5 sec. period.

At the end of the remaining 0.25 sec. the bill leaves the acceptor,assuming that it has been deemed valid.

As the bill 12 advances from the position shown in FIG. 2 to theposition shown in FIG. v3, the optical and magnetic channels areactivated as indicated by the table of FIG. 8. This occurs as the firsttest area or zone of the bill passes the head 38, such zone beingidentified in FIG. 7 as the Grid 1 Test Area. The grid is on both sidesof the portrait 100 and constitutes a portrait background which may beadvantageously sensed for optical and magnetic properties indicative ofgenuine printing. If grid 1 is deemed valid, the outputs of the opticalamplifier and filter combination 42 and the magnetic amplifier 44 willbe of similar wave form and in phase, and of sufficient amplitude tooperate the AND gate 46. The output of gate 46 is fed to the coincidencecounter 48 which is of the integrating type and requires a minimum ofoutputs from gate 46 (a specified pulse train) before it will producethe accept signal Ac. Assuming grid 1 to be valid, Ac is fed into ANDgate 50 together with the T and 8 functions. The output from AND gate 50sets the accept flip-flop memory 72 thereby executing the AMI function.AMI

' via OR gate 94 maintains the transport drive in the forward direction.

T-B occurs when the bill 12 is essentially centered with respect to thehead 38 (FIG. 4). This function sets accept memory 70 to produce the AM2signal. It should be noted that the function T-B constitutes a minimumlength test because, in order to set accept memory 70, the bill 12 mustnot be less than the proper length, the top and bottom light paths inthe channel 22 being approximately 6.2 inches apart.

AM2 is fed to the AND gate 52, and it should be noted that AMI waspreviously fed to the delay circuit 80. The next event is another acceptsignal Ac from the coincidence counter 48 as the Grid 2 Test Area passesthe head 38. The AND gate 52 requires five concurrent inputs: T, B, Ac,AMI, and AM2. Again assuming that the test area is deemed valid (Acproduced), the output from AND gate 52 sets the accept memory 74 therebygenerating the AM3 signal. If the five simultaneous inputs just referredto occur before the delay circuit 80 times out, the reject AND gate 78is blocked since the l logic level from accept memory 74 is removed andG2D is ineffective to trigger the gate.

The bill 12 continues in the forward direction until the bottom lightpath is cleared, thereby executing the 8 function and initiating thecredit signal Cr at the output of AND gate 76. This also initiates thereset delay via reset OR gate 90 to effect resetting of all of theflipflop memories and return of the system to standby.

The foregoing operational description has assumed that an invalidcondition is not encountered. However, failure to pass any one of thevalidity tests will cause the bill or counterfeit material to berejected by one of several logic sequences. When an invalid condition isencountered, the reject OR gate 84 is triggered to produce Rj and effectreversal of the transport drive, thereby returning the bill orcounterfeit material to the depositor. Each of the possible invalidconditions will not be described.

If the bottom light path is interrupterLar d accept memory 72 is notset, the function B-AMl triggers AND gate 82 to', in turn, trigger thereject OR gate 84.

This condition occurs when grid 1 does not have physical propertiesindicative of validity, thus Ac was not produced. v

If Ac occurs when both the upper and lower light paths are interrupted(T-B), AND gate 68 is triggered to, in turn, activate the reject OR gate84. This occurs when an accept signal Ac is produced from what should bethe center of the portrait, indicating that the locations of theportrait and background grids relative to the length of the bill are inaccordance with the arrangement of a genuine bill.

If the top light path is again interrupted after the accept memory 74 isset, AND gate 77 is triggered to, in turn, trigger the reject OR gate84. This condition would occur, for example, if the bill was closelyfollowed by a second bill inadvertently inserted by the depositor.

If G2D occurs and accept memory 74 has not been set, the function GZD'Mactivates AND gate 78 to, in turn, trigger the reject OR gate 84. Thisrequires that the output signal from the five-input AND GATE 52 occur bythe time the bill reaches a predetermined position in the channel 22.For instance, sensing of grid 2 must not be delayed until after theoccurrence of G2D. This function initiates rejection of the bill in theevent that accept memory was not previously set, which would occur ifthe bill failed to pass the lengt test executed by the TB function.

Having thus described the invention, what is claimed as new and desiredto be secured by Letters Patent is:

1. In a currency testing system:

a transport for receiving a bill inserted thereinto and for conveyingthe inserted bill along a predetermined path of travel for testingthereof;

a device disposed to detect the presence of said bill upon saidinsertion thereof into the transport,

said device being operably associated with said transport for renderingthe latter operational when the bill is detected by the device, wherebyto effect advancement of the bill along said path;

a test station in said path having means for sensing physical propertiesof the advancing bill as it passes the test station;

testing means coupled with said sensing means and responsive thereto forproducing an accept signal if the portion of the bill being sensed hasphysical properties indicative of validity,

said testing means effecting a first test of said bill and deliveringsaid accept signal if a predetermined test zone on the bill has saidphysical properties indicative of validity;

a memory coupled with said testing means and responsive to said acceptsignal from said first test;

means responsive to further movement of the bill along said path foreffecting a second validity test while the validity indication from thefirst test is held in said memory, said second test effecting meansincluding a second bill detection device spaced along said path from thefirst mentioned device and disposed to detect the leading edge of a billof proper length at the time that said first device is detecting thetrailing edge thereof, and means responsive to simultaneous detection ofthe inserted bill by said first and second devices for delivering aminimum length test signal indicating that the bill is of at least theproper length;

a second memory responsive to said minimum length test signal; and

output means coupled with said testing means responsive to physicalproperties, said devices, and said memories for delivering an outputsignal if an accept signal is again produced at a second, subsequenttest zone and said first device is not detecting the bill, said seconddevice is detecting the bill, and said memories are holding validityindications from their respective tests.

2. In the system as claimed in claim 1,

said transport having a reversible drive; and

means coupled with said drive for reversing the latter to reject theinserted bill if no accept signal occurs by the time the bill reaches apredetermined position in said path.

3. In the system as claimed in claim 1,

said transport having a reversible drive; and

means coupled with said drive for reversing the latter to reject theinserted bill in response to the concurrent presence of an accept signaland said minimum length test signal.

4. In the system as claimed in claim 1,

said transport having a reversible drive; and

means coupled with said output means and said drive for reversing thelatter to reject the inserted bill unless said output signal occurs bythe time the bill reaches a predetermined position in said path.

5. In the system as claimed in claim 1,

said transport having a reversible drive; and

means coupled with said output means, said first device, and said drivefor reversing the latter to reject the inserted bill if the first devicedetects the presence of the bill or another inserted bill after deliveryof said output signal.

6. In the system as claimed in claim 1 there being means coupled withsaid output means and said second device for delivering a credit signalindicating that the bill is deemed valid, in response to said outputsignal and when said second device no longer detects the bill.

1. In a currency testing system: a transport for receiving a billinserted thereinto and for conveying the inserted bill along apredetermined path of travel for testing thereof; a device disposed todetect the presence of said bill upon said insertion thereof into thetransport, said device being operably associated with said transport forrendering the latter operational when the bill is detected by thedevice, whereby to effect advancement of the bill along said path; atest station in said path having means for sensing physical propertiesof the advancing bill as it passes the test station; testing meanscoupled with said sensing means and responsive thereto for producing anaccept signal if the portion of the bill being sensed has physicalproperties indicative of validity, said testing means effecting a firsttest of said bill and delivering said accept signal if a predeterminedtest zone on the bill has said physical properties indicative ofvalidity; a memory coupled with said testing means and responsive tosaid accept signal from said first test; means responsive to furthermovement of the bill along said path for effecting a second validitytest while the validity indication from the first test is held in saidmemory, said second test effecting means including a second billdetection device spaced along said path from the first mentioned deviceand disposed to detect the leading edge of a bill of proper length atthe time that said first device is detecting the trailing edge thereof,and means responsive to simultaneous detection of the inserted bill bysaid first and second devices for delivering a minimum length testsignal indicating that the bill is of at least the proper length; asecond memory responsive to said minimum length test signal; and outputmeans coupled with said testing means responsive to physical properties,said devices, and said memories for delivering an output signal if anaccept signal is again produced at a second, subsequent test zone andsaid first device is not detecting the bill, said second device isdetecting the bill, and said memories are holding validity indicationsfrom their respective tests.
 2. In the system as claimed in claim 1,said transport having a reversible drive; and means coupled with saiddrive for reversing the latter to reject the inserted bill if no acceptsignal occurs by the time the bill reaches a predetermined position insaid path.
 3. In the system as claimed in claim 1, said transport havinga reversible drive; and means coupled with said drive for reversing thelatter to reject the inserted bill in response to the concurrentpresence of an accept signal and said minimum length test signal.
 4. Inthe system as claimed in claim 1, said transport having a reversibledrive; and means coupled with said output means and said drive forreversing the latter to reject the inserted bill unless said outputsignal occurs by the time the bill reaches a predetermined position insaid path.
 5. In the system as claimed in claim 1, said transport havinga reversible drive; and means coupled with said output means, said firstdevice, and said drive for reversing the latter to reject the insertedbill if the first device detects the presence of the bill or anotherinserted bill after delivery of said output signal.
 6. In the system asclaimed in claim 1, there being means coupled with said output means andsaid second device for delivering a credit signal indicating that thebill is deemed valid, in response to said output signal and when saidsecond device no longer detects the bill.